Silicon carbide and gallium nitride are changing the way modern power electronic systems are designed.
Compared with traditional silicon semiconductors, SiC and GaN power devices can support higher switching frequencies, higher operating temperatures, greater power density, and improved energy efficiency. These characteristics make them valuable in electric vehicles, renewable energy systems, industrial motor drives, data centers, charging equipment, and compact consumer power supplies.
However, the advantages of wide-bandgap semiconductors also create new manufacturing challenges.
SiC and GaN dies are often used in demanding applications where electrical consistency, thermal stability, and long-term reliability are critical. A die that appears acceptable during basic wafer testing may still show abnormal leakage, unstable switching behavior, physical damage, or parameter variation after wafer dicing.
This is where Known Good Die testing becomes important.
A KGD test and sort handler allows manufacturers to inspect, test, classify, and separate individual semiconductor dies before they are assembled into expensive packages or power modules. By moving more quality-control work to the die level, manufacturers can reduce downstream losses and improve the consistency of finished power devices.
What Is a Known Good Die?
KGD stands for Known Good Die.
The term describes an unpackaged semiconductor die that has passed a defined set of electrical, functional, visual, and sometimes thermal tests before it enters the packaging or module assembly process.
A semiconductor die begins as part of a processed wafer. After fabrication, the wafer is electrically tested, divided into individual dies, and then prepared for packaging.
Traditional wafer probing helps identify obvious electrical failures before the wafer is cut. However, wafer-level testing does not always provide a complete picture of die quality.
Additional defects or risks may become visible after singulation, including:
· Edge chipping caused by wafer dicing
· Surface scratches or contamination
· Damage to pads or electrodes
· Die warpage
· Handling-related cracks
· Abnormal leakage under elevated temperature
· Dynamic switching instability
· Parameter drift under electrical stress
KGD testing evaluates individual dies after wafer processing and, in many cases, after singulation. Dies that meet the required criteria are classified as known good dies and can proceed to packaging or module assembly.
Why KGD Testing Matters More for SiC and GaN
KGD testing is useful for many semiconductor products, but it is particularly important for SiC and GaN power devices.
The reason is not simply that these materials are newer. Their applications, electrical characteristics, and manufacturing economics make early screening more valuable.
Wide-Bandgap Devices Operate Under Demanding Conditions
SiC and GaN power semiconductors are frequently used in systems that involve high voltage, high current, rapid switching, or elevated temperature.
Examples include:
· Electric vehicle traction inverters
· On-board chargers
· DC fast-charging stations
· Solar and energy-storage inverters
· Industrial power converters
· Telecom power supplies
· Data center power systems
· High-frequency consumer chargers
A device used in one of these systems must perform consistently under conditions that may be more severe than ordinary room-temperature testing can represent.
Small variations in leakage current, threshold voltage, on-state resistance, or switching behavior can affect system efficiency, heat generation, and long-term reliability.
Testing individual dies before assembly helps manufacturers identify these variations earlier.
Power Modules May Contain Multiple Dies
Many SiC power modules contain several dies connected in parallel or arranged in more complex electrical configurations.
In such a module, the performance of the complete assembly depends on the behavior of every individual die.
One defective or poorly matched die may cause:
· Uneven current sharing
· Localized overheating
· Increased electrical stress
· Reduced module efficiency
· Premature module failure
· Failure during final module testing
The problem becomes more serious because the defective die may not be discovered until after several valuable manufacturing steps have already been completed.
These steps may include die attachment, sintering, wire bonding, substrate assembly, encapsulation, thermal-interface installation, and final testing.
KGD screening reduces the likelihood that an unsuitable die will enter this expensive downstream process.
SiC and GaN Dies Have Significant Manufacturing Value
The cost of a bare die is only one part of the total cost of a finished power module.
Once a die enters packaging, manufacturers add materials, labor, machine time, process control, inspection, and testing. If the final module fails because of a pre-existing die defect, the loss may include several otherwise qualified components.
For this reason, early die-level testing can be economically valuable even when it adds another step to the production flow.
The goal is not simply to reduce the cost of testing. The goal is to reduce the total cost of producing a qualified device or module.
How a KGD Test and Sort Process Works
A KGD test and sort process combines several operations into a coordinated production sequence.
The exact workflow varies according to die type, test requirements, carrier format, and production scale. However, most systems follow a similar logic.
Die Loading
Individual dies must first be transferred from an input carrier into the test process.
Depending on the manufacturing flow, dies may arrive on:
· Diced wafers with adhesive film
· Waffle packs
· Trays
· Customized carriers
· Tape-and-reel materials
Automated loading reduces manual handling and helps maintain a stable production rate.
Careful handling is especially important because bare dies are more exposed than packaged semiconductor components. Excessive force, unstable vacuum pickup, or inaccurate placement may create cracks, chipping, contamination, or surface damage.
Vision Alignment
Before electrical contact is made, a machine-vision system identifies the die position and orientation.
The system may correct horizontal position, vertical position, and rotation angle so that the die can be placed accurately on the test interface.
Precise alignment is essential because the contact areas on a bare die can be very small. A positioning error may lead to poor probe contact, unstable measurements, or physical damage.
Vision alignment also allows the equipment to identify missing, rotated, or incorrectly positioned dies.
Visual Inspection
Electrical functionality is not the only factor that determines whether a die is suitable for packaging.
A die may pass an electrical test while still having visible damage that could affect assembly or long-term reliability.
Visual inspection may check for:
· Edge chipping
· Cracks
· Surface scratches
· Electrode contamination
· Pad damage
· Foreign particles
· Abnormal die dimensions
· Warpage
· Orientation errors
Combining visual inspection with electrical testing gives manufacturers a more complete picture of die quality.
Electrical Testing
After alignment, the die is connected to a semiconductor test system.
The exact measurements depend on whether the device is a SiC MOSFET, SiC diode, GaN transistor, or another type of power semiconductor.
Common test items may include:
· Breakdown voltage
· Leakage current
· Threshold voltage
· On-state resistance
· Forward voltage
· Gate characteristics
· Static current and voltage parameters
· Dynamic switching behavior
· Avalanche performance
· Short-circuit behavior
Not every die requires every test. Manufacturers create a test plan based on device design, target application, quality requirements, production cost, and customer expectations.
Temperature-Controlled Testing
Some defects become more visible when a die is tested at an elevated temperature.
Temperature can influence many semiconductor parameters, including leakage current, threshold voltage, resistance, switching behavior, and breakdown characteristics.
A die that passes at room temperature may behave differently under thermal stress.
High-temperature die testing can help reveal:
· Excessive leakage
· Parameter instability
· Marginal electrical performance
· Temperature-sensitive defects
· Abnormal material or process variation
Thermal testing is particularly relevant for SiC devices because they are frequently selected for high-temperature and high-power applications.
Classification and Sorting
After testing, each die is assigned to a category according to its measured performance and inspection results.
Dies may be classified as:
· Fully qualified
· Electrically failed
· Visually damaged
· Outside the primary performance range
· Suitable for a secondary grade
· Requiring retesting
Automatic sorting moves each die to the correct output location.
Sorting does not only separate good and bad dies. It can also divide qualified dies into different performance groups.
This is useful when manufacturers need tighter matching between dies used in the same module.
How KGD Testing Improves Manufacturing Yield
Yield is one of the most important performance indicators in semiconductor manufacturing.
In simple terms, yield measures how many usable products are produced from a given manufacturing process.
KGD testing can improve effective manufacturing yield in several ways.
Defective Dies Are Removed Earlier
The earlier a defect is identified, the fewer resources are spent on the defective product.
Without die-level screening, an unsuitable die may continue through packaging and module assembly before the problem is discovered.
KGD testing moves part of the failure-detection process upstream.
This does not necessarily change the number of defective dies created during wafer fabrication, but it reduces the number of defective dies that consume downstream materials and manufacturing capacity.
Final Module Failures Can Be Reduced
When only tested and classified dies enter assembly, final module yield can become more predictable.
The benefit is especially important for multi-die modules.
Consider a module containing several power dies. Even when most dies are qualified, one defective die can cause the complete module to fail. The economic loss is therefore larger than the value of the failed die alone.
By screening dies before assembly, manufacturers reduce this compound risk.
Production Resources Are Used More Efficiently
Packaging and module assembly equipment represent a major investment.
Using these resources to process dies that already contain detectable defects wastes production capacity.
KGD testing helps reserve downstream equipment for dies that have a higher probability of becoming qualified products.
This can improve the effective use of:
· Die-bonding equipment
· Sintering systems
· Wire-bonding machines
· Encapsulation lines
· Final test stations
· Engineering and failure-analysis resources
Performance Binning Supports Better Die Matching
Qualified SiC or GaN dies are not always electrically identical.
Normal manufacturing variation can produce differences in:
· On-state resistance
· Threshold voltage
· Leakage current
· Forward voltage
· Switching speed
· Current capability
When several dies operate in parallel, large parameter differences may cause uneven current distribution and thermal imbalance.
Performance binning allows manufacturers to group dies with similar characteristics.
Matched dies can then be assembled into the same module, helping improve electrical balance and product consistency.
The Role of KGD Testing in SiC Manufacturing
Silicon carbide devices are widely used in high-voltage and high-power applications.
SiC MOSFETs and Schottky diodes can offer lower switching losses, reduced heat generation, and improved system efficiency compared with conventional silicon devices.
However, SiC testing presents several challenges.
High-Voltage Testing
Many SiC devices must withstand high blocking voltages.
Testing these devices requires suitable electrical isolation, controlled spacing, and careful management of high-voltage contact.
Poor test-interface design may lead to arcing or unstable measurements, especially when testing small bare dies.
Leakage-Current Measurement
Leakage current is an important quality indicator for high-voltage power devices.
Because the expected leakage may be very small, the test environment must minimize electrical noise, contamination, parasitic paths, and contact instability.
Temperature also affects leakage behavior, which makes thermal control important during screening.
High-Current Contact
Measuring on-state characteristics may require substantial current.
The contact interface must provide low and stable resistance. Otherwise, contact resistance may distort the measurement and create unnecessary heat.
Repeatable contact is therefore essential for comparing dies accurately.
Physical Die Protection
SiC is mechanically hard, but bare SiC dies can still suffer edge damage during dicing, transfer, and handling.
Chipping may not immediately cause electrical failure, but it can create a reliability risk during later assembly or operation.
A combined electrical and visual test process helps identify both functional and physical defects.
The Role of KGD Testing in GaN Manufacturing
Gallium nitride power devices are often used where high switching speed and compact system design are important.
Typical applications include fast chargers, data center power supplies, telecom systems, and high-frequency converters.
GaN testing has its own set of challenges.
Fast Switching Behavior
GaN devices can switch extremely quickly.
This creates advantages in power-conversion efficiency and component size, but it also makes test results more sensitive to the electrical design of the test interface.
Parasitic inductance and capacitance in probes, fixtures, wiring, and measurement equipment can affect dynamic test results.
The handler, tester, contact system, and test circuit must therefore operate as a coordinated system.
Gate Sensitivity
GaN devices may have relatively sensitive gate structures and narrow operating limits.
Careful voltage control and device protection are important during testing.
Improper test conditions may damage a good die or produce misleading results.
Dynamic Electrical Effects
Some GaN characteristics are not fully represented by basic static testing.
Dynamic behavior may change after switching stress or under application-related operating conditions.
For this reason, advanced GaN screening may include both static and dynamic measurements.
Traceability and Process Improvement
A modern KGD process does more than produce a simple pass-or-fail result.
Each die can be linked to information such as:
· Wafer identification
· Original wafer coordinates
· Production lot
· Electrical test values
· Test temperature
· Inspection results
· Defect category
· Performance bin
· Final output location
This creates a detailed quality record for every die.
Traceability helps manufacturers investigate failures and identify patterns that may not be visible from individual results.
For example, engineers may discover that defects are concentrated in a particular region of the wafer. They may also identify relationships between defect rates, processing conditions, test temperatures, or production equipment.
Over time, die-level data can support improvements in wafer fabrication, dicing, handling, testing, and packaging.
KGD Testing Does Not Replace Wafer Testing
KGD testing should not be viewed as a replacement for wafer probing.
The two processes serve related but different purposes.
Wafer testing provides early electrical information before singulation. It helps manufacturers create wafer maps, identify major fabrication failures, and avoid processing obviously defective areas.
KGD testing adds another layer of control after the dies have been separated or prepared for assembly.
A complete quality strategy may therefore include:
1. Wafer-level electrical testing
2. Wafer mapping
3. Dicing and singulation
4. Individual die inspection
5. KGD electrical and thermal testing
6. Die classification and sorting
7. Packaging or module assembly
8. Final product testing
Each stage reduces a different type of manufacturing risk.
Challenges of KGD Testing
Although KGD testing offers important benefits, it also introduces technical and economic challenges.
Test Time
Power semiconductor tests can take longer than simple logic-device measurements, especially when high voltage, high current, dynamic testing, or thermal stabilization is required.
Longer test time reduces throughput and increases testing cost.
Manufacturers must therefore decide which tests are necessary for production screening and which are better suited to sample-based reliability evaluation.
Test Interface Complexity
Bare dies do not have the standardized leads or terminals found on packaged devices.
The contact system must match the die geometry and electrode arrangement.
Changes in die design may require new probes, fixtures, software, or handling parameters.
Temperature Stabilization
Heating a die to the target temperature and waiting for stable conditions can increase cycle time.
The measured temperature must also represent the actual die temperature rather than only the temperature of the surrounding platform.
Handling Risk
Every additional die transfer creates a possible risk of mechanical damage, contamination, or positioning error.
The KGD process must improve quality without introducing new defects.
Cost-Benefit Balance
Not every semiconductor product requires the same level of die screening.
The appropriate test strategy depends on:
· Die value
· Packaging cost
· Number of dies per module
· Application reliability requirements
· Expected defect rate
· Test duration
· Production volume
· Cost of downstream failure
KGD testing provides the greatest value when the cost of allowing a defective die into assembly is significantly greater than the cost of detecting it earlier.
The Future of KGD Testing for Wide-Bandgap Semiconductors
As SiC and GaN production expands, KGD testing is likely to become increasingly automated and data-driven.
Future developments may include:
· More parallel test stations
· Faster temperature control
· Improved high-voltage probe technology
· More accurate three-dimensional inspection
· AI-assisted defect classification
· Greater wafer-map integration
· Real-time production analytics
· Automated die matching
· Predictive maintenance
· Closer connection between test data and manufacturing process control
KGD testing may also become more application-specific.
Automotive SiC devices, compact GaN chargers, industrial power modules, and renewable energy systems do not necessarily require identical test strategies. Manufacturers will continue to adjust screening plans according to the operating risks of each application.
Conclusion
SiC and GaN power devices offer major advantages in efficiency, switching speed, power density, and high-temperature operation. At the same time, these devices require careful quality control because they are often used in demanding and high-value applications.
KGD test and sort handlers help manufacturers evaluate individual dies before packaging or module assembly.
By combining electrical testing, temperature-controlled screening, visual inspection, classification, sorting, and traceability, KGD testing can prevent defective dies from entering expensive downstream processes.
The result is not simply a higher number of tested dies. The broader benefit is a more controlled manufacturing process with better module yield, more consistent die matching, reduced material waste, and stronger production data.
As wide-bandgap semiconductor manufacturing continues to grow, KGD testing will remain an important link between wafer fabrication and reliable power-device assembly.
